The 74LS139 comprises two separate two-line-to-four line decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applications. All of these decoders/demultiplexers feature fully buffered inputs, presenting only one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and simplify system design. These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. Features:- • Designed specifically for high speed: Memory decoders Data transmission systems • 74LS139 contains two fully independent 2-to-4-line decoders/demultiplexers • Schottky clamped for high performance • Typical propagation delay (3 levels of logic) is 21 ns • Typical power dissipation  is 34 mW Specifications:-

Parameter	Specification
Supply Voltage (VCC)	7 V
Input Voltage (VI)	7 V
Operating free-air temperature range	0°C to +70°C
Storage temperature range	–65°C to +150°C

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The 74LS00 is a 14 Pin Quad 2-Input NAND Gate IC. This device contains four independent gates each of which performs the logic NAND function. NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds  with the low power consumption of standard CMOS integrated circuits. All gates have buffered outputs. All devices have high noise immunity and the ability to drive 10 LS-TTL loads. The 74LS logic family is functionally as well as pin-out compatible with the standard 74HC logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.